Show simple item record

dc.contributor.advisor Ismail, Yehea Ahmed, Abdelrahman Hesham Elsayed 2014-07-20T10:59:19Z 2014-07-20T10:59:19Z 2014 Summer en_US 2014-07-20
dc.description.abstract Future technologies will allow the integration of hundreds of billions of transistors on a single chip allowing the fabrication of chips with hundreds of processing cores. So, IC designers should focus on the communication between these cores in order to meet the design requirements in terms of speed, area, power consumption, and time to market constraints. Using conventional parallel buses to transmit data on-chip is not efficient anymore in terms of area, given that in new technologies interconnects do not scale at the same rate as transistors do, and in terms of power due to the large number of drivers, repeaters, and buffers. Also, parallel buses suffer from timing errors due to jitter, and cross talk that eventually limit the performance. One of the solutions to solve these on-chip communication issues is to replace conventional parallel buses with serial links. Although serial communication for both on-chip and off-chip look similar, different problems are faced while designing each of them, leading to different design requirements. Many publications already proposed solutions based on serial links, and dealt with the inter symbol interference on their interconnects using equalization, frequency translation using high frequency carrier signal or using data encoding, or using resistive terminated interconnects. This thesis discusses the on-chip interconnect characteristics, and the difference between them and their off-chip counterparts. Based on their characteristics, the design problems of on-chip interconnects are identified, and solutions are proposed. The thesis proposes a new architecture that multiplexes both data and clock on serial links, reduces inter symbol interference by using a resistive termination technique, and uses two-level Manchester encoding to solve the reduced swing problem and enable the use of power efficient circuitry. Using this signaling scheme makes the system jitter insensitive, and avoids the need for a power hungry clock and data recovery circuit. A self-calibrating digital-delay line is also implemented inside the decoder to enable the system to operate efficiently across process, voltage and temperature variations. The proposed architecture is prepared to be fabricated using the UMC 0.13um CMOS technology. Finally, the proposed system's testing challenges are discussed, and an on-chip testing setup is proposed so that the system meets the design for testability requirements to facilitate the system testing after fabrication. The testing setup is designed for the previously mentioned tape-out, and for another tape-out using the GF 65nm CMOS technology. en_US
dc.description.sponsorship The research was partially funded by SRC, Intel, Global Foundries, STDF, mentor graphics, and MCIT. en_US
dc.format.extent 98 p. en_US
dc.format.medium theses en_US
dc.language.iso en en_US
dc.rights Author retains all rights with regard to copyright. en
dc.subject Circuits and Systems en_US
dc.subject Engineering en_US
dc.subject Systems Engineering en_US
dc.subject Computer science en_US
dc.subject.lcsh Thesis (M.S.)--American University in Cairo en_US
dc.subject.lcsh Systems engineering.
dc.subject.lcsh Computer science.
dc.subject.lcsh Computer networks.
dc.title High speed serial links for on-chip networking en_US
dc.type Still Image en_US
dc.type Text en_US
dc.subject.discipline Electronics Engineering en_US
dc.rights.access This item is available en_US
dc.contributor.department American University in Cairo. Dept. of Electronics Engineering en_US
dc.description.irb American University in Cairo Institutional Review Board approval is not necessary for this item, since the research is not concerned with living human beings or bodily tissue samples. en_US
dc.contributor.committeeMember Anis, Mohab
dc.contributor.committeeMember Eldessouky, Mohamed

Files in this item


This item appears in the following Collection(s)

  • Theses and Dissertations [1707]
    This collection includes theses and dissertations authored by American University in Cairo graduate students.

Show simple item record